Develop detailed circuit specifications for mixed signal circuits.
Conceive circuit architectures and transistor level circuit topologies that satisfy required performance.
Physical implementation (layout) of high-speed circuits.
Optimization of circuits via simulation (with Cadence EDA tools) over all process and operating conditions.
Integration of circuit elements into large analog/mixed signals ASICs.
Participation in the characterization of ASICs.
MSEE or PhD in electrical engineering with 10 or more years experience in the design and characterization of multiple, high frequency and high scale of integration mixed signal integrated circuits.
Direct experience designing High-Speed Analog IC’s and CMOS FinFET (16nm or lower) design experience is a must
Thorough knowledge of high frequency, broad-band Analog Mixed-Signal IC design – both electrical and physical design.
Desired experience in design of VCOs, PLLs, DLLs, ADCs, DACs, clock and data recovery, broadband amplifiers, bias generators, clock distribution networks, high frequency I/Os and high frequency CML designs
Solid understanding of CMOS semiconductor device physics and device modeling.
Solid understanding of electromagnetic theory.
Solid understanding of thermal effects of various circuit topologies and different package types.
Involvement in all phases of multiple IC developments from specification to product introduction.
Proficiency in Verilog or Verilog-A modeling is highly desired.
Solid understanding and experience with IC characterization at high frequencies using high speed sampling oscilloscopes, spectrum analyzers, VNAs, signal sources.