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Mid Level (5-10 years) and Senior Level (15+ years)

We are looking for RFIC Designers for the design of Transceiver and/or Receiver Circuit Blocks in GaAs pHEMT/HBT, Si CMOS/BiCMOS or SiGE BiCMOS. 

The Senior RFIC Design Engineer is responsible for the planning, design, simulation, verification and production ramp support of highly integrated, high volume Front End Module products for the very fast paced and competitive wireless handset market. The Senior RFIC Design Engineer will face challenging tasks in order to meet critical performance parameters in the design of these FEM products.

Strong circuit simulation skills utilizing Agilent ADS and 2.5/3D EM tools such as Momentum, Sonnet or HFSS

U. S. Citizenship or Permanent Residency Required.

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